China Mechanical Engineering ›› 2015, Vol. 26 ›› Issue (10): 1337-1344.

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Real-time Lane Recognition Method Based on Hardware-software Co-design

Zhang Weiwei1;Song Xiaolin1;Zhang Sanlin1;Wu Xuncheng2   

  1. 1.State Key Laboratory of Advanced Design and Manufacturing for Vehicle Body,Hunan University,Changsha,410082
    2.Shanghai University of Engineering Science,Shanghai,201620
  • Online:2015-05-25 Published:2015-05-26
  • Supported by:
    National Natural Science Foundation of China(No. 51175159);Hunan Provincial Science and Technology program ( No. 2013WK3024)

基于软硬件协同设计的车道线实时识别方法

张伟伟1;宋晓琳1;张三林1;吴训成2   

  1. 1.湖南大学汽车车身先进设计制造国家重点实验室,长沙,410082
    2.上海工程技术大学,上海,201620
  • 基金资助:
    国家自然科学基金资助项目(51175159);湖南省科技计划资助项目(2013WK3024);湖南省研究生科研创新项目(CX2013B146) 

Abstract:

In order to obtain robustness and real timing for lane recognition, a lane recognition scheme was designed based on embedded system taking the effective allocation of hardware resource and software function into account. From the perspective of producer/consumer model of the whole system, the necessity of matched enhancement was put forward, and multi-scale matched filtering method was proposed according to the different width characteristics of lane markings, then an adaptive dynamic threshold was set based on local noise estimation from the improved mathematics model of CFAF. The road images of high frame rate and wide dynamic range were captured through field programmable gate array(FPGA) and then the matched filtering was speeded up through the coefficient decomposition technology in the hardware optimization design. Experiments and evaluation prove the proposed system can robustly detect lane markings under different traffic scenarios with the processing frame rate of 60fps.
 

Key words: multi-scale matched filter, constant false alarm rate(CFAR), embedded system, lane recognition

摘要:

为兼顾车道识别的鲁棒性和实时性,综合考虑硬件设计资源和软件功能的有效分配,设计了一种基于嵌入式平台的车道线识别方法。从整个系统的生产消费模型考虑,提出了匹配增强的必要性,并根据车道线不同宽度特征,提出了多尺度匹配滤波方法;根据改进的恒虚警率检测数学模型来估计局部噪声水平从而确定最适应的动态提取阈值。以可编程逻辑门阵列(FPGA)采集高帧率、宽动态范围的道路图像,并以系数分解法实现匹配滤波的硬件加速优化设计。实验和评估结果证明,该嵌入式系统可以在多种交通场景下鲁棒地识别车道线特征点,处理速率达到每秒60帧。

关键词: 多尺度匹配滤波器, 恒虚警率, 嵌入式系统, 车道线识别

CLC Number: