并行多处理器运动控制系统中的分布式存储机制

中国机械工程 ›› 2014, Vol. 25 ›› Issue (8): 1041-1046.

并行多处理器运动控制系统中的分布式存储机制

程鑫1;吴华春1;胡业发1;周云飞2

1.武汉理工大学,武汉,430070
2.华中科技大学,武汉,430074

出版日期:2014-04-25 发布日期:2014-05-06
基金资助:
国家自然科学基金资助项目（51205300）;中央高校基本科研业务费专项资金资助项目（2014-Ⅳ-101)

Distributed Memory Mechanism in Parallel Multiprocessor Motion Control System

Cheng Xin1;Wu Huachun1;Hu Yefa1;Zhou Yunfei2

1.Wuhan University of Technology,Wuhan,430070
2.Huazhong University of Science and Technology,Wuhan,430074

Online:2014-04-25 Published:2014-05-06
Supported by:
National Natural Science Foundation of China（No. 51205300）;Fundamental Research Funds for the Central Universities( No.2014-Ⅳ-101)

摘要/Abstract

摘要：

针对应用于高速高精运动控制系统的并行多处理器控制架构,提出了一种分布式共享存储机制设计思路。基于数字信号处理器设计了并行计算节点,并为各节点设计了本地存储区;采用基于自定义内部总线的消息传递服务,实现了分布式存储区之间共享数据的刷新,构建了统一编址的分布式共享内存模型,以优化各并行计算节点间的数据交互。该分布式存储机制基于硬件实现,其有效性已在实际应用中得到了证实。

关键词: 并行多处理器, 运动控制, 分布式内存, 消息传递

Abstract:

Towards the parallel multiprocessor computing architecture in high speed and high precision motion control system, this paper proposed a design of distributed memory mechanism, where every parallel node based on digital signal processing(DSP) was designed with its local memory. Message passing service based on user-defined internal bus was designed to realize automatic replication of shared data in different local memories, which meant that globally shared memory was set up based on physical distributed memory to optimize the data-exchange performance among each parallel computing nodes. The validity of this hardware-implemented memory mechanism was proved in actual applications.

Key words: parallel multiprocessor, motion control, distributed memory, message passing

中图分类号:

TN305.7

程鑫, 吴华春, 胡业发, 周云飞. 并行多处理器运动控制系统中的分布式存储机制[J]. 中国机械工程, 2014, 25(8): 1041-1046.

Cheng Xin, Wu Huachun, Hu Yefa, Zhou Yunfei. Distributed Memory Mechanism in Parallel Multiprocessor Motion Control System[J]. China Mechanical Engineering, 2014, 25(8): 1041-1046.

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